local_apic.h File Reference

#include "di/bit/prelude.h"
#include "di/util/prelude.h"
#include "iris/mm/physical_address.h"

Go to the source code of this file.

Classes
struct	iris::x86::amd64::ApicVersion
struct	iris::x86::amd64::ApicMaxLvtEntry
struct	iris::x86::amd64::ApicExtendedRegisterPresent
struct	iris::x86::amd64::ApicExtendedFeatureInterruptEnable
struct	iris::x86::amd64::ApicExtendedFeatureSpecificEoi
struct	iris::x86::amd64::ApicExtendedFeatureExtendedId
struct	iris::x86::amd64::ApicExtendedFeatureExtendedLvtCount
struct	iris::x86::amd64::ApicExtendedControlInterruptEnable
struct	iris::x86::amd64::ApicExtendedControlSpecificEoi
struct	iris::x86::amd64::ApicExtendedControlExtendId
struct	iris::x86::amd64::ApicLvtEntryVector
struct	iris::x86::amd64::ApicLvtEntryMessageType
struct	iris::x86::amd64::ApicLvtEntryDeliveryStatus
struct	iris::x86::amd64::ApicLvtEntryRemoteIrr
struct	iris::x86::amd64::ApicLvtEntryTriggerMode
struct	iris::x86::amd64::ApicLvtEntryMask
struct	iris::x86::amd64::ApicLvtEntryTimerMode
struct	iris::x86::amd64::ApicInterruptCommandVector
struct	iris::x86::amd64::ApicInterruptCommandDeliveryMode
struct	iris::x86::amd64::ApicInterruptCommandDestinationMode
struct	iris::x86::amd64::ApicInterruptCommandDeliveryStatus
struct	iris::x86::amd64::ApicInterruptCommandLevel
struct	iris::x86::amd64::ApicInterruptCommandTriggerMode
struct	iris::x86::amd64::ApicInterruptCommandRemoteReadStatus
struct	iris::x86::amd64::ApicInterruptCommandDestinationShorthand
struct	iris::x86::amd64::ApicInterruptCommandDestination
class	iris::x86::amd64::LocalApic

Namespaces
namespace	iris
namespace	iris::x86
namespace	iris::x86::amd64

Typedefs
using	iris::x86::amd64::ApicVersionRegister = di::BitStruct<4, ApicVersion, ApicMaxLvtEntry, ApicExtendedRegisterPresent>
	Local APIC Version Register.
using	iris::x86::amd64::ApicExtendedFeatureRegister
	Local APIC Extended Feature Register.
using	iris::x86::amd64::ApicExtendedControlRegister
	Local APIC Extended Control Register.
using	iris::x86::amd64::ApicLvtEntry
	Local APIC LVT Entry.
using	iris::x86::amd64::ApicInterruptCommandRegister
	Local APIC Interrupt Command Register.

Enumerations
enum class	iris::x86::amd64::ApicOffset : u16 {   iris::x86::amd64::Id = 0x0020 , iris::x86::amd64::Version = 0x0030 , iris::x86::amd64::TaskPriority = 0x0080 , iris::x86::amd64::ArbitrationPriority = 0x0090 ,   iris::x86::amd64::ProcessorPriority = 0x00A0 , iris::x86::amd64::EndOfInterrupt = 0x00B0 , iris::x86::amd64::RemoteRead = 0x00C0 , iris::x86::amd64::LogicalDestination = 0x00D0 ,   iris::x86::amd64::DestinationFormat = 0x00E0 , iris::x86::amd64::SpuriousInterruptVector = 0x00F0 , iris::x86::amd64::InService = 0x0100 , iris::x86::amd64::TriggerMode = 0x0180 ,   iris::x86::amd64::InterruptRequest = 0x0200 , iris::x86::amd64::ErrorStatus = 0x0280 , iris::x86::amd64::LvtTimer = 0x0320 , iris::x86::amd64::InterruptCommandLow = 0x0300 ,   iris::x86::amd64::InterruptCommandHigh = 0x0310 , iris::x86::amd64::TimerLvtEntry = 0x320 , iris::x86::amd64::ThermalLvtEntry = 0x0330 , iris::x86::amd64::PerformanceLvtEntry = 0x0340 ,   iris::x86::amd64::Lint0Entry = 0x0350 , iris::x86::amd64::Lint1Entry = 0x0360 , iris::x86::amd64::ErrorEntry = 0x0370 , iris::x86::amd64::TimerInitialCount = 0x0380 ,   iris::x86::amd64::TimerCurrentCount = 0x0390 , iris::x86::amd64::TimerDivideConfiguration = 0x03E0 , iris::x86::amd64::ExtendedFeature = 0x0400 , iris::x86::amd64::ExtendedControl = 0x0410 ,   iris::x86::amd64::SpecificEndOfInterrupt = 0x0420 , iris::x86::amd64::InterruptEnable = 0x0480 , iris::x86::amd64::ExtendedLvtEntries = 0x0500 }
	Local APIC Register Offsets. More...
enum class	iris::x86::amd64::ApicMessageType : u8 {   iris::x86::amd64::Fixed = 0b000 , iris::x86::amd64::LowestPriority = 0b001 , iris::x86::amd64::Smi = 0b010 , iris::x86::amd64::RemoteRead = 0b011 ,   iris::x86::amd64::Nmi = 0b100 , iris::x86::amd64::Init = 0b101 , iris::x86::amd64::Startup = 0b110 , iris::x86::amd64::External = 0b111 }
	Local APIC Message Type. More...
enum class	iris::x86::amd64::ApicTimerDivideConfiguration : u32 {   iris::x86::amd64::DivideBy2 = 0b0000 , iris::x86::amd64::DivideBy4 = 0b0001 , iris::x86::amd64::DivideBy8 = 0b0010 , iris::x86::amd64::DivideBy16 = 0b0011 ,   iris::x86::amd64::DivideBy32 = 0b1000 , iris::x86::amd64::DivideBy64 = 0b1001 , iris::x86::amd64::DivideBy128 = 0b1010 , iris::x86::amd64::DivideBy1 = 0b1011 }
	Local APIC Timer Divide Configuration. More...
enum class	iris::x86::amd64::ApicDestinationShorthand { iris::x86::amd64::None = 0b00 , iris::x86::amd64::Self = 0b01 , iris::x86::amd64::AllIncludingSelf = 0b10 , iris::x86::amd64::AllExcludingSelf = 0b11 }
	Local APIC Destination Shorthands. More...

Functions
void	iris::x86::amd64::init_local_apic (bool print_info)
void	iris::x86::amd64::init_alternative_processors ()